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products:sbc:edge2:hardware:edge2-boot-flow

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products:sbc:edge2:hardware:edge2-boot-flow [2023/05/15 21:50]
hyphop [SPL stage] 		products:sbc:edge2:hardware:edge2-boot-flow [2023/07/17 03:15] (current)
hyphop [Uboot image format]
Line 3: Line 3:
 ====== Edge2 Boot flow ====== ====== Edge2 Boot flow ======
  
-Edge2 have advanced and flexible booting sequence... WIP:+[[:Edge2]] have advanced and flexible boot flow ... see also [[boot-sequence]]
  
  
Line 14: Line 14:
  
 ====== Hardware buttons ====== ====== Hardware buttons ======
- 
-WIP: 
  
   * ''FUNCTION'' + ''RESET'' - [[/software/oowow/getting-started#what-is-oowow|oowow mode]]    * ''FUNCTION'' + ''RESET'' - [[/software/oowow/getting-started#what-is-oowow|oowow mode]] 
Line 24: Line 22:
          
  
-====== Bootmode =======+====== MCU features ======
  
-''i2cget -f -y  2 0x18 0x20''+See too: [[#mcu-registers-annotation]]
  
-^ bootmode    ^ value ^ +===== Boot mode ====== 
 + 
 +Common boot mode configuration ''0x20'' 
 + 
 +^ boot mode    ^ value ^ 
 | spi         | 0     | | spi         | 0     |
 | mmc         | 1     | | mmc         | 1     |
  
-====== OOWOW mode ======= 
  
-''i2cget -f -y  2 0x18 0x92''+```sh boot-mode read 
 +i2cget -f -y 2 0x18 0x20 
 +``` 
 + 
 +===== Boot flag ====== 
 + 
 +This flag ''0x92'' will be used one time on next reboot! and not change common [[#boot-mode]]
  
-^ oowow_mode    ^ value ^ +^  boot flag    ^ value ^ 
 | disabled      |0      | | disabled      |0      |
-| request       |1      | +| [[/software/oowow/getting-started#what-is-oowow|OOWOW request]] |1      | 
-| activated     |2      | +| boot from SPI      |2      | 
-| passed        |3      | +| boot from eMMC     |3      |
-| rescue        |5      |+
  
-====== Reboot modes by MCU ======= 
  
-''i2cset -f -y  2 0x18 0x91 value''+```sh boot-flag read 
 +i2cget -f -y 2 0x18 0x92 
 +``` 
 + 
 +<WRAP important > 
 +boot-flag will be used only one time and after reboot will be masked by ''^ 0x50'' on SPL stage 
 +</WRAP> 
 + 
 +^  boot flag note  ^ mask ^  
 +| spl mask      |0x50      | 
 +| oowow mask      |0xA0      |
  
-^ oowow_mode     ^ value ^  
-| spi            |0      | 
-| mmc            |1      | 
-| default reboot |2      | 
  
 <WRAP important > <WRAP important >
-At this moment all modes works same as ''spi''+boot-flag value ''> 10'' will be reset to ''0'' on reboot SPL stage
 </WRAP> </WRAP>
  
-   +===== Reboot mode ====== 
 + 
 +We can reboot device by non standard way via MCU ''0x91'' register with special options. 
 +  
 +^ reboot mode     ^ value ^  
 +| SPI             |0      | 
 +| normal reboot   |1      | 
 +| eMMC            |2      | 
 + 
 +```sh reboot-mode read 
 +i2cset -f -y  2 0x18 0x91 value 
 +``` 
 + 
 +<WRAP important > 
 +Device will be rebooted immediately after successful writing to ''0x91'' MCU register   
 +</WRAP> 
 + 
 +<WRAP important > 
 +Only ''normal reboot == 1'' dos not change [[#boot-flag]] on next reboot!\\ 
 +''SPI == 0'' will change [[#boot-flag]] to ''2'' on next reboot\\ 
 +''eMMC == 2'' will change [[#boot-flag]] to ''3'' on next reboot\\ 
 +</WRAP> 
 + 
 + 
 +See too: [[#mcu-registers-annotation]]
 ====== Boot modes oowow shell usage ====== ====== Boot modes oowow shell usage ======
  
 WIP: WIP:
  
-==== Set boot mode ====+==== Boot mode setup examples ====
  
 ```shell ```shell
 +
 +## read current boot-mode
 +
 ~# bootmode ~# bootmode
 spi spi
 +
 +## setup to MMC
  
 ~# bootmode mmc ~# bootmode mmc
Line 72: Line 112:
 ~# bootmode ~# bootmode
 mmc mmc
 +
 +## setup to SPI
  
 ~# bootmode spi ~# bootmode spi
Line 105: Line 147:
 ``` ```
  
-==== Reboot by MCU ====+==== Reboot by MCU examples ====
  
 Forced hardware reboot Forced hardware reboot
  
 ```shell ```shell
 +## oowow shell
 ~# mcu_reboot ~# mcu_reboot
  
-~# i2cset -f -y 2 0x18 0x91 2+## common system 
 +~# i2cset -f -y 2 0x18 0x91 1
 ``` ```
  
Line 124: Line 168:
 ==== Reboot from SPI flash U-Boot via i2c command ==== ==== Reboot from SPI flash U-Boot via i2c command ====
  
-WIP: not works as need  +```sh reset and use u-boot from spi flash
- +
-```sh reboot into oowow +
-i2cset -f -y 2 0x18 0x92 0+
 i2cset -f -y 2 0x18 0x91 0 i2cset -f -y 2 0x18 0x91 0
 ``` ```
 +
 +<WRAP important >
 +In this case U-boot will be started from SPI flash, next booting will in same u-boot prio ''USB'' ''SD'' ''eMMC'' and ''Rescue OOWOW mode'' will be last! If u need start oowow please use [[#reboot-into-oowow-via-i2c-command]] 
 +</WRAP>
  
 ====== SPL stage ====== ====== SPL stage ======
Line 168: Line 213:
 MCU version: 02 & 03 MCU version: 02 & 03
  
-0x91  +0x91 REBOOT_MODE 
-    0 - reset and boot from spi +    0 - reset and boot from SPI 
-    2 - reset and boot from emmc +    1 - reset normal 
-    1 - reset+    2 - reset and boot from eMMC
  
-0x92 BOOT_FLAG (oowow will check this register about boot mode)+0x92 BOOT_FLAG
     0 - normal     0 - normal
-    1 - press FUNC bootup +    1 - press FUNC boot-up 
-    2 - reset from spi bootup +    2 - reset from SPI boot-up 
-    3 - reset from emmc bootup+    3 - reset from eMMC boot-up
 ``` ```
          
 +See too: [[#mcu-features]]
 +
 ===== U-boot spl  ===== ===== U-boot spl  =====
  
 +WIP:
  
 ```c u-boot/arch/arm/mach-rockchip/spl-boot-order.c ```c u-boot/arch/arm/mach-rockchip/spl-boot-order.c
 +
 +// ......
 +
 /* khadas mcu part begin */ /* khadas mcu part begin */
-#define MCU_I2C_BUS_NUM         2 +#define MCU_I2C_BUS_NUM              2 
-#define MCU_I2C_CHIP_ADDR       0x18 +#define MCU_I2C_CHIP_ADDR            0x18 
-#define MCU_I2C_REG_BOOT_MODE   0x20 +#define MCU_I2C_REG_BOOT_MODE        0x20 
-#define MCU_I2C_REG_BOOT_MODE_SPI   0x00 +#define MCU_I2C_REG_BOOT_MODE_SPI    0x00 
-#define MCU_I2C_REG_BOOT_MODE_MMC   0x01 +#define MCU_I2C_REG_BOOT_MODE_MMC    0x01 
-#define MCU_I2C_REG_OOWOW_MODE  0x92 +#define MCU_I2C_REG_BOOT_FLAG        0x92 
-#define MCU_I2C_REG_OOWOW_MODE_NONE    0x00 +#define MCU_I2C_REG_RESET_MODE       0x91 
-#define MCU_I2C_REG_OOWOW_MODE_ACTIVE  0x01 +#define MCU_I2C_REG_BOOT_FLAG_NORMAL 0x00 
-#define MCU_I2C_REG_OOWOW_MODE_PASS    0x02+#define MCU_I2C_REG_BOOT_FLAG_FUNC   0x01 
 +#define MCU_I2C_REG_BOOT_FLAG_OOWOW  0x01 
 +#define MCU_I2C_REG_BOOT_FLAG_SPI    0x02 
 +#define MCU_I2C_REG_BOOT_FLAG_EMMC   0x03 
 +#define MCU_I2C_REG_BOOT_FLAG_RESCUE 0x05 
 +#define MCU_I2C_REG_BOOT_FLAG_PASS   0x50 
 #define MCU_I2C_REG_LED  0x89 #define MCU_I2C_REG_LED  0x89
 /* khadas mcu part end */ /* khadas mcu part end */
Line 209: Line 266:
 /* khadas mcu part begin */ /* khadas mcu part begin */
  uchar mcu_boot_mode;  uchar mcu_boot_mode;
- uchar mcu_oowow_mode;+ uchar mcu_boot_flag;
  uchar mcu_led_normal = 8; /* white breath */  uchar mcu_led_normal = 8; /* white breath */
- uchar mcu_led_oowow  = 1; /* white solid */+ uchar mcu_led_reset  = 1; /* white solid */
  int ret;  int ret;
  struct udevice *bus;  struct udevice *bus;
Line 221: Line 278:
  if (ret) goto mcu_skip;  if (ret) goto mcu_skip;
  ret = dm_i2c_read(dev, MCU_I2C_REG_BOOT_MODE, &mcu_boot_mode, 1);  ret = dm_i2c_read(dev, MCU_I2C_REG_BOOT_MODE, &mcu_boot_mode, 1);
- ret = dm_i2c_read(dev, MCU_I2C_REG_OOWOW_MODE, &mcu_oowow_mode, 1); + ret = dm_i2c_read(dev, MCU_I2C_REG_BOOT_FLAG, &mcu_boot_flag, 1); 
- printf("MCU: bootmode: %d, oowow %d\n", mcu_boot_mode, mcu_oowow_mode); + printf("MCU: boot mode 0x20: %d, flag 0x92: %d\n", 
- // reset oowow mode +                          mcu_boot_mode, mcu_boot_flag); 
- if ( mcu_oowow_mode != 0 ) { + // reset boot flag 
- mcu_oowow_mode = mcu_oowow_mode == 1 ? 2 : 0; + if ( mcu_boot_flag != 0 ) { 
- ret = dm_i2c_write(dev, MCU_I2C_REG_OOWOW_MODE, &mcu_oowow_mode, 1); + mcu_boot_flag = mcu_boot_flag > 10 ? 0 : mcu_boot_flag ^ MCU_I2C_REG_BOOT_FLAG_PASS; 
- printf("MCU: oowow %d\n", mcu_oowow_mode); + dm_i2c_write(dev, MCU_I2C_REG_BOOT_FLAG, &mcu_boot_flag, 1); 
- ret = dm_i2c_write(dev, MCU_I2C_REG_LED, &mcu_led_oowow, 1);+ printf("MCU: boot flag < %d\n", mcu_boot_flag); 
 + if ( mcu_boot_flag != 0 ) 
 +     dm_i2c_write(dev, MCU_I2C_REG_LED, &mcu_led_reset, 1);
  } else {  } else {
- ret = dm_i2c_write(dev, MCU_I2C_REG_LED, &mcu_led_normal, 1);+ dm_i2c_write(dev, MCU_I2C_REG_LED, &mcu_led_normal, 1);
  }  }
 mcu_skip: mcu_skip:
Line 254: Line 313:
  /* Handle the case of 'same device the SPL was loaded from' */  /* Handle the case of 'same device the SPL was loaded from' */
  if (strncmp(conf, "same-as-spl", 11) == 0) {  if (strncmp(conf, "same-as-spl", 11) == 0) {
- if (mcu_oowow_mode)+ 
 + // /mmc@fe2c0000 - SD 
 + // /mmc@fe2e0000 - EMMC 
 + 
 + mcu_boot_flag &= 0x0F; // restore original flag 
 + if (mcu_boot_flag == 1 || mcu_boot_flag == 2 || mcu_boot_flag == 5)
      conf = "/spi@fe2b0000/flash@1";      conf = "/spi@fe2b0000/flash@1";
 + else if (mcu_boot_flag == 3)
 +     conf = "/mmc@fe2e0000";
  else if (mcu_boot_mode == MCU_I2C_REG_BOOT_MODE_MMC)  else if (mcu_boot_mode == MCU_I2C_REG_BOOT_MODE_MMC)
      continue;      continue;
Line 309: Line 375:
 0x0000004c8000-0x0000006c8000 : "boot"       # zero 0x0000004c8000-0x0000006c8000 : "boot"       # zero
 0x0000006c8000-0x000002000000 : "user"       # zero 0x0000006c8000-0x000002000000 : "user"       # zero
 +```
 +
 +===== Uboot =====
 +
 +
 +==== Uboot image format ====
 +
 +Need be stored by offset ''CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000'' (check it [[##uboot-oowow-defconfig]]) as FIT packed image
 +
 +```txt uboot-info 
 +Info: UBOOT_COMPRESSION: lzma
 +FIT description: FIT Image with ATF/OP-TEE/U-Boot/MCU
 +Created:         Mon Jul 17 14:59:34 2023
 + Image 0 (uboot)
 +  Description:  U-Boot
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Standalone Program
 +  Compression:  lzma compressed
 +  Data Size:    430151 Bytes = 420.07 KiB = 0.41 MiB
 +  Architecture: AArch64
 +  Load Address: 0x00200000
 +  Entry Point:  unavailable
 +  Hash algo:    sha256
 +  Hash value:   72065bbc30ae3f4bcd548f6ff2a7b9dd1a629f09a2b192ee530eab82ec6d1b32
 + Image 1 (atf-1)
 +  Description:  ARM Trusted Firmware
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Firmware
 +  Compression:  lzma compressed
 +  Data Size:    47147 Bytes = 46.04 KiB = 0.04 MiB
 +  Architecture: AArch64
 +  Load Address: 0x00040000
 +  Hash algo:    sha256
 +  Hash value:   65a97025c2150f2ed0fb746a438612a3f1521d8305e14ccd5807bd58b2e7fe9c
 + Image 2 (atf-2)
 +  Description:  ARM Trusted Firmware
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Firmware
 +  Compression:  uncompressed
 +  Data Size:    28672 Bytes = 28.00 KiB = 0.03 MiB
 +  Architecture: AArch64
 +  Load Address: 0x000f0000
 +  Hash algo:    sha256
 +  Hash value:   6a00298af819b30f482d5ba9e53d6fa6bb2719007f69ff985e23e06d4f9d439f
 + Image 3 (atf-3)
 +  Description:  ARM Trusted Firmware
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Firmware
 +  Compression:  uncompressed
 +  Data Size:    20480 Bytes = 20.00 KiB = 0.02 MiB
 +  Architecture: AArch64
 +  Load Address: 0xff100000
 +  Hash algo:    sha256
 +  Hash value:   33280a39887591959dcb20ad42140a5eeed61fde49b7a38cc44172cd8f1a9dc7
 + Image 4 (atf-4)
 +  Description:  ARM Trusted Firmware
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Firmware
 +  Compression:  uncompressed
 +  Data Size:    8192 Bytes = 8.00 KiB = 0.01 MiB
 +  Architecture: AArch64
 +  Load Address: 0xff001000
 +  Hash algo:    sha256
 +  Hash value:   2301cf73be91bb638ecd9c296d6674b9d52696a3825745070c92e21e79c8be24
 + Image 5 (optee)
 +  Description:  OP-TEE
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Firmware
 +  Compression:  lzma compressed
 +  Data Size:    177774 Bytes = 173.61 KiB = 0.17 MiB
 +  Architecture: AArch64
 +  Load Address: 0x08400000
 +  Hash algo:    sha256
 +  Hash value:   1fcfe45105750e2fcd47a14b54c80d66a8b2f7ad3a166b699d2bb5b0e2a3ed69
 + Image 6 (fdt)
 +  Description:  U-Boot dtb
 +  Created:      Mon Jul 17 14:59:34 2023
 +  Type:         Flat Device Tree
 +  Compression:  uncompressed
 +  Data Size:    8262 Bytes = 8.07 KiB = 0.01 MiB
 +  Architecture: AArch64
 +  Hash algo:    sha256
 +  Hash value:   5648101b8ee7ec2a390f0a072eb27f47724d40e2f76d8dc2be624e6114b84d67
 + Default Configuration: 'conf'
 + Configuration 0 (conf)
 +  Description:  rk3588s-khadas-edge2
 +  Kernel:       unavailable
 +  Firmware:     atf-1
 +  FDT:          fdt
 +  Loadables:    uboot
 +                atf-2
 +                atf-3
 +                atf-4
 +                optee
 +-rw-rw-r-- 1 master master 725504 Jul 17 14:59 u-boot-cmp.itb
 +Info: pack uboot.img okay!
 +Info: Generating uboot-sd.img ... 0x4000 == 16384 > u-boot.itb
 +```
 +==== Uboot oowow defconfig ====
 +
 +```txt u-boot/configs/khadas-edge2-rk3588s-oowow_defconfig
 +CONFIG_ARM=y
 +CONFIG_ARCH_ROCKCHIP=y
 +CONFIG_SPL_GPIO_SUPPORT=y
 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
 +CONFIG_SYS_MALLOC_F_LEN=0x80000
 +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
 +CONFIG_ROCKCHIP_RK3588=y
 +CONFIG_ROCKCHIP_FIT_IMAGE=y
 +CONFIG_ROCKCHIP_EARLY_DISTRO_DTB=y
 +CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH="/dtb.img"
 +CONFIG_ROCKCHIP_HWID_DTB=y
 +CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 +# CONFIG_ROCKCHIP_VENDOR_PARTITION is not set
 +CONFIG_USING_KERNEL_DTB_V2=y
 +CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 +CONFIG_ROCKCHIP_NEW_IDB=y
 +CONFIG_LOADER_INI="RK3588MINIALL.ini"
 +CONFIG_TRUST_INI="RK3588TRUST.ini"
 +CONFIG_SPL_SERIAL_SUPPORT=y
 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 +CONFIG_TARGET_KEDGE2=y
 +CONFIG_SPL_LIBDISK_SUPPORT=y
 +CONFIG_SPL_SPI_FLASH_SUPPORT=y
 +CONFIG_SPL_SPI_SUPPORT=y
 +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-khadas-edge2"
 +CONFIG_DEBUG_UART=y
 +CONFIG_FIT=y
 +CONFIG_FIT_IMAGE_POST_PROCESS=y
 +CONFIG_FIT_HW_CRYPTO=y
 +CONFIG_SPL_LOAD_FIT=y
 +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 +CONFIG_SPL_FIT_HW_CRYPTO=y
 +# CONFIG_SPL_SYS_DCACHE_OFF is not set
 +CONFIG_BOOTDELAY=1
 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
 +# CONFIG_DISPLAY_CPUINFO is not set
 +CONFIG_ANDROID_BOOTLOADER=y
 +CONFIG_ANDROID_AVB=y
 +CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 +CONFIG_SPL_BOARD_INIT=y
 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 +CONFIG_SPL_SEPARATE_BSS=y
 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION is not set
 +CONFIG_SPL_MMC_WRITE=y
 +CONFIG_SPL_MTD_SUPPORT=y
 +CONFIG_SPL_ATF=y
 +CONFIG_SYS_PROMPT="kedge2# "
 +CONFIG_FASTBOOT_BUF_ADDR=0xc00800
 +CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 +CONFIG_FASTBOOT_FLASH=y
 +CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 +CONFIG_CMD_BOOTZ=y
 +CONFIG_CMD_DTIMG=y
 +# CONFIG_CMD_ELF is not set
 +# CONFIG_CMD_IMI is not set
 +# CONFIG_CMD_IMLS is not set
 +# CONFIG_CMD_XIMG is not set
 +# CONFIG_CMD_LZMADEC is not set
 +# CONFIG_CMD_UNZIP is not set
 +# CONFIG_CMD_FLASH is not set
 +# CONFIG_CMD_FPGA is not set
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_I2C=y
 +# CONFIG_CMD_LOADB is not set
 +# CONFIG_CMD_LOADS is not set
 +CONFIG_CMD_BOOT_ANDROID=y
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SPI=y
 +CONFIG_CMD_USB=y
 +CONFIG_CMD_USB_MASS_STORAGE=y
 +# CONFIG_CMD_ITEST is not set
 +# CONFIG_CMD_SETEXPR is not set
 +CONFIG_CMD_TFTPPUT=y
 +CONFIG_CMD_TFTP_BOOTM=y
 +CONFIG_CMD_TFTP_FLASH=y
 +# CONFIG_CMD_MISC is not set
 +CONFIG_CMD_MTD_BLK=y
 +CONFIG_CMD_KHADAS_KBI=y
 +# CONFIG_SPL_DOS_PARTITION is not set
 +# CONFIG_ISO_PARTITION is not set
 +CONFIG_SPL_OF_CONTROL=y
 +CONFIG_SPL_DTB_MINIMUM=y
 +CONFIG_OF_LIVE=y
 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 +CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 +# CONFIG_NET_TFTP_VARS is not set
 +CONFIG_REGMAP=y
 +CONFIG_SPL_REGMAP=y
 +CONFIG_SYSCON=y
 +CONFIG_SPL_SYSCON=y
 +# CONFIG_SARADC_ROCKCHIP is not set
 +CONFIG_SARADC_ROCKCHIP_V2=y
 +CONFIG_CLK=y
 +CONFIG_SPL_CLK=y
 +CONFIG_CLK_SCMI=y
 +CONFIG_SPL_CLK_SCMI=y
 +CONFIG_DM_CRYPTO=y
 +CONFIG_SPL_DM_CRYPTO=y
 +CONFIG_ROCKCHIP_CRYPTO_V2=y
 +CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
 +CONFIG_DM_RNG=y
 +CONFIG_RNG_ROCKCHIP=y
 +CONFIG_SCMI_FIRMWARE=y
 +CONFIG_SPL_SCMI_FIRMWARE=y
 +CONFIG_ROCKCHIP_GPIO=y
 +CONFIG_ROCKCHIP_GPIO_V2=y
 +CONFIG_SYS_I2C_ROCKCHIP=y
 +CONFIG_DM_KEY=y
 +CONFIG_RK8XX_PWRKEY=y
 +CONFIG_ADC_KEY=y
 +CONFIG_MISC=y
 +CONFIG_SPL_MISC=y
 +CONFIG_MISC_DECOMPRESS=y
 +CONFIG_SPL_MISC_DECOMPRESS=y
 +CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 +CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 +CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 +CONFIG_MMC_DW=y
 +CONFIG_MMC_DW_ROCKCHIP=y
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_SDMA=y
 +CONFIG_MMC_SDHCI_ROCKCHIP=y
 +CONFIG_MTD=y
 +CONFIG_MTD_BLK=y
 +CONFIG_MTD_DEVICE=y
 +CONFIG_NAND=y
 +CONFIG_MTD_SPI_NAND=y
 +CONFIG_SPI_FLASH=y
 +CONFIG_SF_DEFAULT_SPEED=80000000
 +CONFIG_SPI_FLASH_EON=y
 +CONFIG_SPI_FLASH_GIGADEVICE=y
 +CONFIG_SPI_FLASH_MACRONIX=y
 +CONFIG_SPI_FLASH_SST=y
 +CONFIG_SPI_FLASH_WINBOND=y
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_XTX=y
 +CONFIG_SPI_FLASH_MTD=y
 +CONFIG_DM_ETH=y
 +CONFIG_DM_ETH_PHY=y
 +CONFIG_DWC_ETH_QOS=y
 +CONFIG_GMAC_ROCKCHIP=y
 +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
 +CONFIG_PHY_ROCKCHIP_USBDP=y
 +CONFIG_PINCTRL=y
 +CONFIG_SPL_PINCTRL=y
 +CONFIG_DM_FUEL_GAUGE=y
 +CONFIG_POWER_FG_CW201X=y
 +CONFIG_DM_PMIC=y
 +CONFIG_PMIC_SPI_RK8XX=y
 +CONFIG_DM_POWER_DELIVERY=y
 +CONFIG_TYPEC_TCPM=y
 +CONFIG_TYPEC_TCPCI=y
 +CONFIG_TYPEC_HUSB311=y
 +CONFIG_TYPEC_FUSB302=y
 +CONFIG_REGULATOR_PWM=y
 +CONFIG_DM_REGULATOR_FIXED=y
 +CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_REGULATOR_RK860X=y
 +CONFIG_REGULATOR_RK806=y
 +CONFIG_CHARGER_BQ25700=y
 +CONFIG_CHARGER_BQ25890=y
 +CONFIG_DM_CHARGE_DISPLAY=y
 +CONFIG_CHARGE_ANIMATION=y
 +CONFIG_PWM_ROCKCHIP=y
 +CONFIG_RAM=y
 +CONFIG_SPL_RAM=y
 +CONFIG_TPL_RAM=y
 +CONFIG_DM_RAMDISK=y
 +CONFIG_RAMDISK_RO=y
 +CONFIG_ROCKCHIP_SDRAM_COMMON=y
 +CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
 +CONFIG_DM_RESET=y
 +CONFIG_SPL_DM_RESET=y
 +CONFIG_SPL_RESET_ROCKCHIP=y
 +CONFIG_BAUDRATE=1500000
 +CONFIG_DEBUG_UART_BASE=0xFEB50000
 +CONFIG_DEBUG_UART_CLOCK=24000000
 +CONFIG_DEBUG_UART_SHIFT=2
 +CONFIG_ROCKCHIP_SPI=y
 +CONFIG_ROCKCHIP_SFC=y
 +CONFIG_SYSRESET=y
 +CONFIG_USB=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_DWC3=y
 +CONFIG_USB_EHCI_HCD=y
 +CONFIG_USB_EHCI_GENERIC=y
 +CONFIG_USB_OHCI_HCD=y
 +CONFIG_USB_OHCI_GENERIC=y
 +CONFIG_USB_DWC3=y
 +CONFIG_USB_DWC3_GADGET=y
 +CONFIG_USB_DWC3_GENERIC=y
 +CONFIG_USB_STORAGE=y
 +CONFIG_USB_GADGET=y
 +CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 +CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 +CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
 +CONFIG_USB_GADGET_DOWNLOAD=y
 +CONFIG_DM_VIDEO=y
 +CONFIG_DISPLAY=y
 +CONFIG_DRM_ROCKCHIP=y
 +CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
 +CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
 +CONFIG_DRM_ROCKCHIP_DW_DP=y
 +CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 +CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
 +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
 +CONFIG_USE_TINY_PRINTF=y
 +CONFIG_LIB_RAND=y
 +CONFIG_SPL_TINY_MEMSET=y
 +CONFIG_RSA=y
 +CONFIG_SPL_RSA=y
 +CONFIG_RSA_N_SIZE=0x200
 +CONFIG_RSA_E_SIZE=0x10
 +CONFIG_RSA_C_SIZE=0x20
 +CONFIG_LZ4=y
 +CONFIG_ERRNO_STR=y
 +CONFIG_AVB_LIBAVB=y
 +CONFIG_AVB_LIBAVB_AB=y
 +CONFIG_AVB_LIBAVB_ATX=y
 +CONFIG_AVB_LIBAVB_USER=y
 +CONFIG_RK_AVB_LIBAVB_USER=y
 +CONFIG_OPTEE_CLIENT=y
 +CONFIG_OPTEE_V2=y
 +CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 +# CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION is not set
 +
 +CONFIG_SPL_LZMA=y
 +CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot"
 +CONFIG_AUTOBOOT_DELAY_STR="2"
 +CONFIG_AUTOBOOT_STOP_STR=" "
 +
 +#CONFIG_MTD_BLK_U_BOOT_OFFS=0x5000
 +#CONFIG_MTD_BLK_U_BOOT_OFFS=0x4000
 +CONFIG_MTD_BLK_U_BOOT_OFFS=0x300
 +
 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 +#CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 +
 +CONFIG_LZMA=y
 +CONFIG_CMD_LZMADEC=y
 +CONFIG_LZO=y
 +
 +#CONFIG_USB_ETHER=y
 +CONFIG_USB_HOST_ETHER=y
 +CONFIG_USB_ETHER_ASIX=y
 +CONFIG_USB_ETHER_ASIX88179=y
 +CONFIG_USB_ETHER_RTL8152=y
 +
 +
 +## CONFIG_ROCKCHIP_EARLY_DISTRO_DTB is not set
 +## CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH is not set
 +## CONFIG_USING_KERNEL_DTB_V2 is not set
 +## CONFIG_ROCKCHIP_HWID_DTB is not set
 +## CONFIG_USING_KERNEL_DTB is not set
 +
 +#CONFIG_EMBED_KERNEL_DTB_PATH="arch/arm/dts/rk3588s-khadas-edge2.dtb"
 +#CONFIG_EMBED_KERNEL_DTB_ALWAYS=y
 +
 +CONFIG_CMD_UNZIP=y
 +CONFIG_CMD_MD5SUM=y
 +CONFIG_CMD_ITEST=y
 +
 +#CONFIG_MULTI_DTB_FIT=y
 +#CONFIG_SPL_MULTI_DTB_FIT=y
 +
 +CONFIG_HEXDUMP=y
 +
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_DOS_PARTITION=y
 +
 +CONFIG_CMD_GPT=y
 +## CONFIG_EFI_PARTITION is not set
 +# CONFIG_SPL_EFI_PARTITION is not set
 +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 +# CONFIG_EFI_LOADER is not set
 +
 +## mcu bootmode control
 +CONFIG_SPL_I2C_SUPPORT=y
 +
 +## no need buggy
 +# CONFIG_ROCKCHIP_HW_DECOMPRESS is not set
 +# CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS is not set
 +# CONFIG_MISC_DECOMPRESS is not set
 +# CONFIG_SPL_MISC_DECOMPRESS is not set
 +
 +CONFIG_SPL_GZIP=y
 +
 +CONFIG_CMD_MISC=y
 +
 +CONFIG_AUTOBOOT_KEYED_CTRLC=y
 +
 ``` ```
  
Last modified: 2023/05/15 21:50 by hyphop

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