This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision | ||
products:sbc:edge2:applications:gpio:40pin-header [2022/10/18 03:38] hyphop |
products:sbc:edge2:applications:gpio:40pin-header [2023/08/13 22:33] (current) jacobe [Table] |
||
---|---|---|---|
Line 1: | Line 1: | ||
~~tag> | ~~tag> | ||
- | ====== Edge2 GPIO header ====== | + | {{indexmenu_n> |
- | Universal GPIO 40 pins board header, used for communication between board and different external devices. | ||
- | ====== | + | ====== |
<WRAP important > | <WRAP important > | ||
- | Current GPIO numbers valid for vendor kernel only. Mainline linux kernel GPIO numbers will be different... | + | An Edge2 IO board is needed. |
</ | </ | ||
- | ^ GPIO num ^ Name | + | Edge2 IO board 16 pins GPIO header, used for communication between board and different external devices. |
- | | | + | |
- | | | SARADC_IN4 | + | |
- | | | + | ====== Reference table ====== |
- | | 112 | SPI1_MOSI_M1 / GPIO3_C0 | + | |
- | | 111 | SPI1_MISO_M1 / GPIO3_B7 | + | |
- | | | + | ^ GPIO num ^ Name |
- | | | + | | |
- | | | I2C6_SCL_M0_3V3 | + | | |
- | | | + | | 111 |
- | | | MCU_IR_IN | + | | 112 | SPI1_MISO |
- | | | PWR_KEY_IN | + | | 114 | SPI1_CSO |
- | | | SARADC_IN3 | + | | 113 | SPI1_CLK |
- | | | VCC_3V3_S3 | + | | 24 |
- | | | + | | 23 |
- | | | + | |
- | | | + | |
- | | | PWM3_IR_M3 | + | |
- | | | GND (0V) | + | |
- | | | MCU_USART2_TX | + | |
- | | | MCU_USART2_RX | + | |
{{page> | {{page> | ||